skip to primary navigationskip to content

sr_elliott1_2015

Heat control in electronic circuits at the nanoscale

As electronic circuits are scaled down ever smaller, in accord with Moore’s Law, deleterious waste-heat effects become increasingly significant, especially for 3D stacked circuits, even for low-current devices. Cooling of devices, therefore, is becoming critical for their effective operation. At present, this is achieved on the macro-scale by cooling entire devices. It would be more effective to be able ‘steer’ heat at the nanoscale (circuit level) around critical heat-sensitive circuits, for example. In addition, there are certain electronic devices, e.g. non-volatile (NV) ‘phase-change’ random-access memory (PCRAM), which actually operate via the Joule heating; voltage pulses are applied to memory cells, switching the PC material reversibly between crystalline metallic (‘1’) and amorphous semiconducting (‘0’) states. In order to reduce the power requirements of such NVM devices, it would be advantageous to concentrate the heat pulses in individual memory cells. This would, at the same time, reduce thermal ‘cross-talk’ between neighbouring cells as size down-scaling occurs.   The aim of this project to investigate, using a variety of computational methods, how heat transport can be controlled and steered at the nanoscale, for example by developing appropriate ‘thermal metamaterials’ for specific applications. Our preliminary finite-element simulations, using commercial software, have demonstrated that this heat-steering approach is feasible at the nanoscale, for example for the case of silicon components. Indeed, we have also demonstrated other behaviour based on thermal steering, e.g. ‘thermal logic’. The project will involve a systematic study of this novel research field, addressing, in particular, the cross-over from diffusive to ballistic thermal transport at the nanoscale, size-dependent quantum effects (e.g. of thermal conductivity), and the in silico discovery of efficient thermal metamaterials. The work will be carried out in collaboration with device-fabrication and characterization colleagues in Cambridge, Southampton and Singapore in order to manufacture working ‘low-heat’ electronic circuits and devices based on this project’s computational studies in a contribution to the ‘green computing’ initiative.